Analog-to-digital converters, or ADCs, convert real world signals such as audio and video to digital signals where they can be processed by digital processors, Speed, power consumption, cost and noise are all considerations in the design of analog-to-digital converters.
Delta-sigma (ΔΣ; or sigma-delta, ΣΔ) modulation is a digital signal processing, or DSP, method for encoding analog signals into digital signals as found in an ADC. It is also used to transfer higher-resolution digital signals into lower-resolution digital signals as part of the process to convert digital signals into analog.
According to Kester, Delta modulation was first invented at ITT laboratories in France in 1946 by E. M. Deloraine, S. Van Mierlo, and B. Derjavitch. C. C. Cutler of Bell Telephone Labs filed a patent on differential pulse code modulation (PCM) in 1950.
In a conventional ADC, an analog signal is integrated, or sampled, with a sampling frequency and subsequently quantized in a multi-level quantizer into a digital signal. This process introduces quantization error noise. Delta modulation and differential PCM was directed to achieving higher transmission efficiency by transmitting only the changes, the delta, in value between consecutive samples.
The first step in a delta-sigma modulation is delta modulation. In delta modulation the change in the signal (its delta) is encoded, rather than the absolute value. The result is a stream of pulses, as opposed to a stream of numbers as is the case with PCM. In delta-sigma modulation, the accuracy of the modulation is improved by passing the digital output through a 1-bit DAC and adding (sigma) the resulting analog signal to the input signal, thereby reducing the error introduced by the delta-modulation.
In 1962, Inose, Yasuda, and Murakami used solid state circuits and elaborated on the single-bit oversampling noise-shaping architecture proposed by Cutler in 1954. All the work described thus far was related to transmitting an oversampled digitized signal directly rather than the implementation of a Nyquist analog to digital converter (ADC). In 1969 D. J. Goodman at Bell Labs described a true Nyquist Sigma-Delta (Σ-Δ) ADC with a digital filter and a decimator following the modulator . In 1974 J. C. Candy, also of Bell Labs, described a multibit oversampling Σ-Δ ADC with noise shaping, digital filtering, and decimation to achieve a high resolution Nyquist ADC. The IC Σ-Δ ADC offers several advantages over the other architectures, especially for high resolution, low frequency applications. First and foremost, the single-bit Σ-Δ ADC is inherently monotonic and requires no laser trimming. The Σ-Δ ADC also lends itself to low cost foundry CMOS processes because of the digitally intensive nature of the architecture.
Modern CMOS Σ-Δ ADCs (and DACs, for that matter) are the converters of choice for voiceband and audio applications. The highly digital architectures lend themselves nicely to fine-line CMOS. In addition, high resolution (up to 24 bits) low frequency Σ-Δ ADCs have virtually replaced the older integrating converters in precision industrial measurement applications. Accordingly, this technique has found increasing use in modern electronic components such as converters, frequency synthesizers, switched-mode power supplies and motor controllers, primarily because of its cost efficiency and reduced circuit complexity.[1]
Although there have been additional improvements in the field of Σ-Δ ADCs, there is still a need for improved Σ-Δ ADC technology, especially K-Delta-1-Sigma Modulators (KG1Ss) that achieve multi GHz sampling rates with 90 nm and 45 nm CMOS processes, and that provide the capability to balance performance with power in many applications.
Additionally, there is a need for KD1Ss that activate all paths when high performance is needed (e.g. high bandwidth), and that reduce the effective bandwidth by shutting down multiple paths when low performance is required.
Further, the remains a need for KD1Ss that can adjust the baseband filtering for lower bandwidth.
And further still, there is a need for KD1Ss that can provide large savings in power consumption while maintaining the communication link, which is a great advantage in space communications.
Additionally, there is a need for KD1Ss where the receiver adjusts to accommodate a higher rate when a packet is received at a low bandwidth, where at a initial lower rate, power is saved by turning off paths in the KD1S Analog to Digital Converter, and where when a higher rate is required, multiple paths are enabled in the KD1S to accommodate the higher band widths.